True charge domain Time Delay Integration
Back Side Illuminated (BSI) pixels
High Sensitivity with QE of 63.9% @ 266 nm and 93.4% @ 440 nm
High Speed: up to 1 MHz
HDR read out
On-chip binning
Resolution
8.2K
Nr of Active Pixels
P1: 8208 pixels x 256 stages, P2: 8208 pixels x 32 stages
Optical format
41.04 mm
Pixel size
5 μm x 5 μm
Full well capacity
17.0 ke‾ @ 10-bit
Temporal noise
14.3 e‾ @ 10-bit
Dynamic Range
61.5 dB @ 10-bit
Max Line Rate
1 MHz
Peak QE
93.4% @ 440 nm
Shutter type
Time Delay Integration
Parasitic Light Sensitivity
-
Photosensive area
P1: 41.04 mm x 1.28 mm, P2: 41.04 mm x 0.16 mm
Angular response
-
Dark Current
4.6 ke‾/pix/sec @ 11.9℃
Max. SNR
42.3 dB @ 10-bit
ADC
10/12 bit
Output format
72 ch Sub-LVDS @ 10-bit
Channel multiplexing
72/54/48/36/24/18/12/6 @ 10-bit
Max. Data rate
86.4 Gbps @ 10-bit
Chroma
Mono
Power consumption
< 4.2 W @ 10-bit
Supply voltage
3.3 V (analog), 1.65 V (ADC), 1.6 V (digital)
Package
μPGA 231 pins (56.90 mm x 19.00 mm)
Availability
Engineering Samples (ES)
