True charge domain Time Delay Integration
Back Side Illuminated (BSI) pixels
High Sensitivity with QE of 70.7% @ 266 nm (UV Version) and up to 92.4 % @ 440 nm (VIS version)
High Speed: up to 500 kHz
HDR read out
On-chip binning
Resolution
16.4K
Nr of Active Pixels
P1: 16416 pixels x 256 stages P2: 16416 pixels x 32 stages
Optical format
82.02 mm
Pixel size
5 μm x 5 μm
Full well capacity
15.0 ke‾
Temporal noise
7.7 e‾
Dynamic Range
65.8 dB
Max Line Rate
500 kHz
Peak QE
UV version - 70.7% @ 266 nm - 87.8% @ 420 nm, VIS version - 92.4% @ 436 nm - 87.0% @ 590 nm
Shutter type
Time Delay Integration
Parasitic Light Sensitivity
-
Photosensive area
P1: 82.08 mm × 1.28 mm, P2: 82.08 mm × 0.16 mm
Angular response
-
Dark Current
1.0 ke‾/pix/sec @ 16.5℃
Max. SNR
41.7 dB
ADC
12 bit
Output format
108 ch Sub-LVDS
Channel multiplexing
108/96/72/48/36/24/12
Max. Data rate
103.68 Gbps
Chroma
Mono
Power consumption
< 6.2 W
Supply voltage
3.3 V (analog), 1.65 V (ADC), 1.6 V (digital)
Package
μPGA 415 pins (98.08 mm x 19.00 mm)
Availability
Engineering Samples (ES)
